With the unprecedented demand for network infrastructure from artificial intelligence, optical interconnect components such as PAM4 digital signal processors (DSPs) have become the key to providing internal bandwidth in data centers, helping operators quickly expand their networks with reliable, low latency, and high bandwidth connections. The demand for higher interconnect speeds is accelerating towards 1.6T, and LightCounting predicts that sales of 1.6T Ethernet optical transceivers will exceed $15 billion by 2030.
1.6T connectivity for Scale out and Scale Crosse architectures
Scale up networks focus on connecting as many graphics processing units (GPUs) as possible for parallel processing, while scale out networks connect these vertical expansion nodes together. Horizontal scaling architecture requires high-speed interconnects with high bandwidth, low power consumption, and small size. Compared with the traditional two-stage non return to zero (NRZ) transmission method, PAM4 DSP application specific integrated circuit (ASIC) doubles the bit rate of short-range optical interconnect, which can meet this requirement. Network operators can also choose to use 1.6T optical devices for cross domain network expansion, achieving GPU connections up to 10 kilometers away.

Figure 1: PAM4 DSP Application Specific Integrated Circuit (ASIC) helps network operators meet the expansion needs within data centers.
Kibo 1.6T PAM4 DSP with high reliability, high bandwidth, and low power consumption
Kibo is designed specifically for 1.6T optical transceivers, supporting 200G PAM4 data transmission per channel. Compared to existing 1.6T modules used to meet the high reliability connection requirements of AI networks, it reduces power consumption by 20%. The Kibo PAM4 digital signal processor, when used in conjunction with Acacia’s optical engine, can provide the performance and energy efficiency required to meet the most demanding AI workloads. This 3-nanometer Kibo digital signal processor has started providing samples and will be showcased at the Optical Fiber Communication Conference (OFC).

Figure 2: Kibo digital signal processor can be combined with high-speed transmission and reception optical engines to achieve multi-channel high-speed PAM4 modulation transmission
The main features of Acacia Kibo digital signal processor include:
-Low power consumption – using a 3-nanometer complementary metal oxide semiconductor (CMOS) process to achieve industry-leading energy efficiency;
-Compliant with standards – enhancing industry standard compatibility through Acacia’s algorithm to mitigate the impact of optical damage;
-Supporting TRO – equipped with TRO configuration for launch rescheduling, which can efficiently support diagnosis and loop fault troubleshooting functions;
-Flexible configuration – supports gearbox and re timer applications;
-Wide module support – designed to support 1.6T DR8 and 2 × FR4 modules, as well as 800G DR4, DR8, FR4, and 2 × FR4 modules in OSFP/QSFP-DD package form.
Kibo uses a 3-nanometer CMOS silicon wafer and utilizes complex algorithms reliably implemented in high transistor count, low-power silicon application specific integrated circuits (ASICs) to achieve a bit rate of 200G per channel.

Figure 3: Kibo 3 Nano PAM4 Digital Signal Processor Can Achieve Key 1.6T Optical Interconnection Transmission in AI Horizontal Expansion Architecture
Acacia is a trusted DSP supplier
The expected strong growth trend of the 1.6T module indicates that having numerous PAM4 digital signal processor (DSP) suppliers is crucial, as these suppliers need to support this growth by providing large quantities, high-quality, and reliable components. Acacia has over 15 years of practical experience in designing digital signal processors (DSPs) and high-speed radio frequency (RF), which can reduce electrical and optical damage, ensure extremely high robustness and reliable high-speed connections, and support mass production.